Dynamic random-access memory (DRAM) is a type of computer data storage. The term “random-access” alludes to the fact that data can be written to and read from designated addresses at random, as opposed to having to increment through a sequence of addresses to get to a designated location. DRAM stores digital data as representative voltages in storage capacitors. For example, a relatively high voltage or a relatively low voltage on a given capacitor can represent a logic one or a logic zero, respectively. The storage capacitors leak their stored charge, so the stored voltages quickly change with time. The information the voltages represent thus fades unless the stored voltages are periodically refreshed. That is, each memory cell is read and the voltage on it refreshed before the stored voltage has an opportunity to change so much that it no longer represents the originally stored data.
Each DRAM memory cell of the type described above stores a single logical bit, which can represent either a one or a zero. For example, a stored voltage in a range above a reference voltage may represent a logic one and below the reference voltage a logic zero. Storage density could be increased if more than one bit could be stored in a single memory cell. This is the concept behind multilevel DRAM (MLDRAM). In general, in MLDRAM, an n-bit digital value is represented by a single voltage that can be in one of 2n voltage ranges. Each voltage range corresponds to a respective one of the 2n possible states of the n-bit value. In conventional DRAM, one bit is stored in a single memory cell using 21=2 voltage ranges. In an example of MLDRAM, two bits can be stored in a single memory cell if the MLDRAM can reliably identify the one of 22=4 voltage ranges to which the voltage belongs. In theory, a two-bit MLDRAM could increase the storage density by a factor of about two.
The main disadvantage of MLDRAM is that the greater number of voltage ranges used to represent the additional data bit or bits reduces the extent of each voltage range and, hence, the difficulty of reliably identifying the voltage range to which the voltage stored in the memory cell belongs. Further, the memory cells of MLDRAM may require more frequent refreshing because the stored voltages can more quickly decay to the next-lower voltage range. Practical MLDRAM circuits will require improved methods and circuits for storing, sensing, and refreshing voltages representing multiple bits.